# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI Keystone Soc USB Controller

maintainers:
  - Roger Quadros <rogerq@kernel.org>

properties:
  compatible:
    items:
      - enum:
          - ti,keystone-dwc3
          - ti,am654-dwc3

  reg:
    maxItems: 1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

  ranges: true

  interrupts:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 2

  assigned-clocks:
    minItems: 1
    maxItems: 2

  assigned-clock-parents:
    minItems: 1
    maxItems: 2

  power-domains:
    maxItems: 1
    description: Should contain a phandle to a PM domain provider node
      and an args specifier containing the USB device id
      value. This property is as per the binding,
      Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml

  phys:
    maxItems: 1
    description:
      PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY
      to be turned on before the controller.
      Documentation/devicetree/bindings/phy/phy-bindings.txt

  phy-names:
    items:
      - const: usb3-phy

  dma-coherent: true

  dma-ranges: true

patternProperties:
  "usb@[a-f0-9]+$":
    $ref: snps,dwc3.yaml#

required:
  - compatible
  - reg
  - "#address-cells"
  - "#size-cells"
  - ranges
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    dwc3@2680000 {
      compatible = "ti,keystone-dwc3";
      #address-cells = <1>;
      #size-cells = <1>;
      reg = <0x2680000 0x10000>;
      clocks = <&clkusb>;
      interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
      ranges;

      usb@2690000 {
        compatible = "snps,dwc3";
        reg = <0x2690000 0x70000>;
        interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
        usb-phy = <&usb_phy>, <&usb_phy>;
      };
    };
